The inventive concept relates to wafer test equipment used for electrical testing of a wafer, and, more particularly, to an interface structure between a tester head and a probe card that is configured to be directly connected to a wafer under test.
During a manufacturing process, semiconductor devices are functionally tested to determine whether they operate within normal operating parameters or whether they are defective. For example, when a plurality of semiconductor chips are manufactured on a common wafer, it can be determined at that time whether the certain ones of the semiconductor chips are normal or defective through electrical die sort (EDS) testing, prior to dicing of the chips into individual components.
Test equipment used for electrical testing of the wafer is commonly referred to in industry as a “tester”. The tester interfaces with a device under test (DUT) via a tester head, a performance board, and a probe card of a probe station.
A tester head includes a densely arranged plurality of signal terminals connected to a plurality of test channels. The test channels are thereby connected to the DUT to conduct electrical testing of the wafer. A plurality of needles are arranged in a lowermost portion of the probe card so that the probe card can be made to be in electrical contact with the semiconductor chip that is the DUT.
In this manner, the tester and the probe card of the probe station are used to conduct electrical testing of the wafer. Accordingly, the normal or defective status, for example, ‘pass’, ‘repair’, or ‘reject’ status of a plurality of chips on a wafer can be determined.